exp 10(down)

0
Favorite
1
copy
Copy
341
Views
exp 10(down)

Circuit Description

Graph image for exp 10(down)

Circuit Graph

Synchronous Counter Design a 3-bit synchronous counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation

There are currently no comments

Profile image for ag5780

AG5780

ag5780

Creator

RA2111031010061

19 Circuits

Date Created

3 years, 1 month ago

Last Modified

3 years, 1 month ago

Tags

  • digital
  • counter

Circuit Copied From