Exp-10A

0
Favorite
2
copy
Copy
114
Views
Exp-10A

Circuit Description

Graph image for Exp-10A

Circuit Graph

Synchronous Counter Design a 3-bit synchronous counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation

There are currently no comments

Profile image for deeptadip

Exp-10A

deeptadip
Profile image for Atharvaa.P

Exp-10A

Atharvaa.P

Creator

itsmahi27

19 Circuits

Date Created

2 years, 9 months ago

Last Modified

2 years, 9 months ago

Tags

  • digital
  • counter

Circuit Copied From