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Synchronous Counter Design a 3-bit synchronous counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation k map Ja=1 Ka=1 Jb=Qa' Kb=Qa' Jc= Qa' Qb' ; Kc=Qa' Qb' x0 x0 x1