Standard TTL AND-OR-Invert (AOI) / NOR Gate Structure
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Circuit Description
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The circuit shows the structure of standard TTL AOI Gate. Input clamp diodes were excluded from the circuit.
Multiple-emitter input transistors are emulated using Qin2a/Qin2b with base-collector in parallel and Qin3a/Qin3b/Qin3c with base-collector in parallel.
If Qin2 and Qin3 are implemented using single-emitter transistors the AND function is lost so the gate simply becomes a NOR Gate.
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