3상 위상제어 thyristor (1)

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3상 위상제어 thyristor (1)

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The behavior of an SCR thyristor is demonstrated by use of partially gated periodic signals as input sources. 💬 After a pulse angle width of 45° on the 60Hz AC inputs, ~At the start of each new period of the signals ~ ➡️ the phase angle controller U1 generates a gate pulse to trigger SCR_A. ➡️It fires a secondary pulse 180° after the first to trigger SCR_B 💬 Illustrated is the resulting output voltage and load current .

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Creator

환일29

258 Circuits

Date Created

2 years, 8 months ago

Last Modified

2 years, 8 months ago

Tags

  • kopo

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