STC Day1 Demo5 Full Adder and Subtractor circuit

A 4-bit 2’s complement format adder/subtractor circuit. It is capable of indicating the occurrence of an overflow condition. The circuit has two 4-bit inputs, A and B, and a 1-bit input Op. The value of Op defines the operation (addition or subtraction). The outputs for the circuit are R(4-bit wide) and Ov (1-bit wide; Ov = 1 = overflow and Ov= 0 = no overflow).