Eeamp problem3 (1)

This is a modification of the circuit D Latch With Enable. AND gates were inserted between the input NAND gates and the output latch. This allows active-low Preset and Clear functions to be added to the D latch. When nPRESET is low the output of the top AND gate becomes low regardless of the state of the D and C input signals. Hence, an active-low SET is applied to the output S-R latch which forces Q high. When nCLEAR is low the output of the bottom AND gate becomes low regardless of the state of the D and C input signals. Hence, an active-low RESET is applied to the output S-R latch which forces Q low. Since nPRESET and nCLEAR are independent from C, they are also called DIRECT SET and DIRECT RESET.