Browser not supported

✕
Go back

Tier limit reached

✕

RA1911028010129 - Experiment 10 (3-bit synchronous Up Counter)

0
Favorite
1
copy
Copy
212
Views
Open Circuit
RA1911028010129 - Experiment 10 (3-bit synchronous Up Counter)
Social Share
Embed circuit
Embed linked image

Circuit Description

Graph image for RA1911028010129 - Experiment 10 (3-bit synchronous Up Counter)

Circuit Graph

Synchronous Counter Design a 3-bit synchronous up counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation

There are currently no comments

Profile image for RA1911003010322

RA191003010322

RA1911003010322

Creator

Profile image for ra1911028010129

RA1911028010129

30 Circuits

Date Created

3 years, 11 months ago

Last Modified

3 years, 11 months ago

Tags

  • digital
  • counter

Circuit Copied From

RA1911028010081 - Experiment 10 (Up Counter)

Related Circuits

Preview of D flip-flop

D flip-flop

by Sobrjery

10846
7
copy
268
Preview of 3-bit Adder

3-bit Adder

by EESal

6184
2
copy
25
Preview of 3-Bit Asynchronous Counter Using D-Flip Flop

3-Bit Asynchronous Counter Using D-Flip Flop

by Angeles_Maila

5520
1
copy
19

Circuit Graph

✕
Graph image for RA1911028010129 - Experiment 10 (3-bit synchronous Up Counter)

Remove Comment

✕

Are you sure you want to remove your comment? This action cannot be undone.

Cancel Remove Comment

✕
Cancel Send

Enter Email

✕