version2

0
Favorite
1
copy
Copy
151
Views
version2

Circuit Description

Graph image for version2

Circuit Graph

Synchronous Counter Design a 3-bit synchronous counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation

There are currently no comments

Profile image for eloscarel23

version2 (1)

eloscarel23

Creator

eloscarel23

7 Circuits

Date Created

1 year, 4 months ago

Last Modified

1 year, 4 months ago

Tags

  • digital
  • counter

Circuit Copied From