Browser not supported

✕
Go back

Tier limit reached

✕

D flip flop

0
Favorite
2
copy
Copy
436
Views
Open Circuit
D flip flop
Social Share
Embed circuit
Embed linked image

Circuit Description

Graph image for D flip flop

Circuit Graph

D flip-flop created from NAND gates, using clock voltage as the data source. I recommend setting the Grapher time range from 0-5 seconds after running the simulation.

There are currently no comments

Profile image for akash123xyz

d flip flop end sem

akash123xyz
Profile image for user-27586

D flip flop

user-27586

Creator

Profile image for ra1911044010023

RA1911044010023

4 Circuits

Date Created

3 years, 7 months ago

Last Modified

3 years, 7 months ago

Tags

  • digital
  • nand gate
  • flip-flop
  • d fd flip-flop

Circuit Copied From

D flip-flop

Related Circuits

Preview of 4-Bit Digital Counter

4-Bit Digital Counter

by Dayna

27950
15
copy
919
Preview of 3 bit Counter

3 bit Counter

by KWen99

15980
4
copy
158
Preview of Master-Slave D Latch (Edge-Triggered D Flip-Flop) With Preset And Clear

Master-Slave D Latch (Edge-Triggered D Flip-Flop) With Preset And Clear

by GGoodwin

8909
0
copy
30

Circuit Graph

✕
Graph image for D flip flop

Remove Comment

✕

Are you sure you want to remove your comment? This action cannot be undone.

Cancel Remove Comment

✕
Cancel Send

Enter Email

✕