Browser not supported

✕
Go back

Tier limit reached

✕

J-K Latch

0
Favorite
0
copy
Copy
304
Views
Open Circuit
J-K Latch
Social Share
Embed circuit
Embed linked image

Circuit Description

Graph image for J-K Latch

Circuit Graph

This is a J-K latch with active high Enable (C), the functions are tabulated below: NO CHANGE: J=0, K=0 RESET: J=0, K=1 SET: J=1, K=0 With J and K both high: when C is high, Q and NOTQ will be both high which is invalid when C is low, Q and NOTQ will be at equal logic states cycling HIGH and LOW fast

There are currently no comments

Creator

Profile image for prajwall8

Prajwall8

15 Circuits

Date Created

2 years, 8 months ago

Last Modified

2 years, 8 months ago

Tags

  • flip-flop
  • jk latch
  • j-k
  • j-k latch
  • jk
  • jk flip-flop
  • j-k flip-flop
  • latch
  • jk flip flop
  • j-k flip flop

Circuit Copied From

J-K Latch

Related Circuits

Preview of D flip-flop

D flip-flop

by Sobrjery

11555
7
copy
269
Preview of Counter to 7 Segment Display with JK Flip-flops and Logic Gates

Counter to 7 Segment Display with JK Flip-flops and Logic Gates

by robo_Jeff

10940
7
copy
40
Preview of 4-bit Binary Up Counter JK Flip-Flop

4-bit Binary Up Counter JK Flip-Flop

by ProfessorBaloney

5929
3
copy
113

Circuit Graph

✕
Graph image for J-K Latch

Remove Comment

✕

Are you sure you want to remove your comment? This action cannot be undone.

Cancel Remove Comment

✕
Cancel Send

Enter Email

✕