Browser not supported

✕
Go back

Tier limit reached

✕

Q # 6.4

0
Favorite
3
copy
Copy
221
Views
Open Circuit
Q # 6.4
Social Share
Embed circuit
Embed linked image

Circuit Description

Graph image for Q # 6.4

Circuit Graph

Consider a JK′ flip-flop, i.e., a JK flip-flop with an inverter between external input K′ and internal input K. (a) Obtain the flip-flop characteristic table. (b) Obtain the characteristic equation. (c) Show that tying the two external inputs together forms a D flip-flop.

There are currently no comments

Profile image for 2020CS420

Q # 6.31

2020CS420
Profile image for 2020CS420

Q # 6.22 (BCD Counter)

2020CS420
Profile image for 2020CS420

Copy of Q # 6.4

2020CS420

Creator

Profile image for 2020cs420

2020CS420

57 Circuits

Date Created

3 years, 3 months ago

Last Modified

3 years, 2 months ago

Tags

  • digital
  • flip-flop
  • counter

Circuit Copied From

State Equation Design

Related Circuits

Preview of Master-Slave D Latch (Edge-Triggered D Flip-Flop) With Preset And Clear

Master-Slave D Latch (Edge-Triggered D Flip-Flop) With Preset And Clear

by GGoodwin

8909
0
copy
30
Preview of Master-Slave J-K Flip-Flop

Master-Slave J-K Flip-Flop

by GGoodwin

7828
1
copy
93
Preview of Master-Slave S-R Latch (Pulse-Triggered Flip-Flop)

Master-Slave S-R Latch (Pulse-Triggered Flip-Flop)

by GGoodwin

6883
1
copy
22

Circuit Graph

✕
Graph image for Q # 6.4

Remove Comment

✕

Are you sure you want to remove your comment? This action cannot be undone.

Cancel Remove Comment

✕
Cancel Send

Enter Email

✕