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158_ASHLESHA_D flip-flop_3 (1)

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158_ASHLESHA_D flip-flop_3 (1)
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D flip-flop created from NAND gates, using clock voltage as the data source. I recommend setting the Grapher time range from 0-5 seconds after running the simulation.

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158.ashlesha

24 Circuits

Date Created

2 years, 6 months ago

Last Modified

2 years, 6 months ago

Tags

  • digital
  • flip-flop
  • d flip flop

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158_ASHLESHA_D flip-flop_3

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