Full Adder using basic gates

The circuit performs the mathematical function of adding three binary digits. The three digits are the Augend (AG), Addend (AD) and Carry Input (CI). The addend and the carry input are added to augend generating Sum (SUMf) and Carry Output (COf) as output signals. The SUMf output bit will be set if the number of input bits set to 1 is odd. Thus the SUMf output can be generated by a three-input Exclusive OR (XOR) gate. The carry output (COf) bit will be set if two or all of the input bits are 1s. Then, a three-input majority voting logic circuit can be used for carry output. Variables / Signal Names: CI = Carry Input AG = Augend AD = Addend SUMf = (Full adder) Sum COf = (Full subtractor) Carry Output For Full Subtractor: https://www.multisim.com/content/TR3Ck3HsJXpwcZ3iuYQjzR/full-subtractor/ For Half Adder: https://www.multisim.com/content/YZgqMmn73ceEynBkiRXUeS/half-adder/ For Full Adder Using Two Half Adders: https://www.multisim.com/content/cu38wufkNopY7q3DbNxMhj/full-adder-using-two-half-adders/ For Configurable-Mode Full Subtractor/Adder: https://www.multisim.com/content/gwds95xFpmG5tfsUC5GzeH/configurable-mode-full-subtractoradder/ For Simultaneous Dual Function Half Adder-Subtractor: https://www.multisim.com/content/MoUhGPsqRXjNsmYbzrMahn/simultaneous-dual-function-half-adder-subtractor/ For Configurable-Mode Full Subtractor/Adder Using Half Subtractor/Adder And Half Adder: https://www.multisim.com/content/7f3C4LtEzu8adz9gefm5yf/configurable-mode-full-subtractoradder-using-half-subtractoradder-and-half-adder/