Browser not supported

✕
Go back

Tier limit reached

✕

PRANAV KUMAR (RA2011003010855) EXP 10(A)

0
Favorite
5
copy
Copy
162
Views
Open Circuit
PRANAV KUMAR (RA2011003010855) EXP 10(A)
Social Share
Embed circuit
Embed linked image

Circuit Description

Graph image for PRANAV KUMAR (RA2011003010855) EXP 10(A)

Circuit Graph

Synchronous Counter Design a 3-bit synchronous counter with the sequence below by using JK flip flops. 1 5  3  7  4 0 2  6  ... Apply the clock pulses and observe the output. Verify your design with output waveform simulation

There are currently no comments

Profile image for pranav2301

PRANAV KUMAR (RA2011003010855) EXP 10(B)

pranav2301
Profile image for manikanta2002

K Sai (893)EXP 10(A)

manikanta2002
Profile image for praveen9633

PRAVEEN REDDY (RA2011003010886) EXP 10(A)

praveen9633
Profile image for charan2406

Charan Reddy 881 10 A

charan2406
Profile image for atahar777

ATAHAR-EXP 10(A)

atahar777

Creator

Profile image for pranav2301

pranav2301

24 Circuits

Date Created

2 years, 9 months ago

Last Modified

2 years, 9 months ago

Tags

  • digital
  • counter

Circuit Copied From

JK - FF& Clock

Related Circuits

Preview of D flip-flop

D flip-flop

by Sobrjery

10844
7
copy
268
Preview of 3-bit Adder

3-bit Adder

by EESal

6184
2
copy
25
Preview of 3-Bit Asynchronous Counter Using D-Flip Flop

3-Bit Asynchronous Counter Using D-Flip Flop

by Angeles_Maila

5520
1
copy
19

Circuit Graph

✕
Graph image for PRANAV KUMAR (RA2011003010855) EXP 10(A)

Remove Comment

✕

Are you sure you want to remove your comment? This action cannot be undone.

Cancel Remove Comment

✕
Cancel Send

Enter Email

✕